Today, I have learned a new fpga design concept called "Flancter". Clyde introduced this in the VHDL class.
While searching about this on google, I found couple of interesting links:
http://www.doulos.com/knowhow/fpga/fastcounter/
Books related to this topic:
Real Chip Design and Verification using Verilog and VHDL
While searching about this on google, I found couple of interesting links:
http://www.doulos.com/knowhow/fpga/fastcounter/
Books related to this topic:
Real Chip Design and Verification using Verilog and VHDL
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